The present invention relates generally to a fault recovery method for a storage apparatus of a computer-based information processing system or a computer-based information processing apparatus and is associated with fault detection and fault recovery for ensuring the continuation of a desired operation of the system as a whole even if the storage apparatus, a component of the system, fails. More particularly, the present invention relates to a linking technology for linking a processor with a shared module in a multiprocessor system and a fault tolerance control technology based on the linking technology.
Today, with computer-based information processing systems being in wide use through general society, their faults will result in extremely serious social troubles. On the other hand, as the scale of these systems increases, it is almost impossible to make the systems fault-free. Consequently, it is required for every information processing system to continue as a whole a desired operation even if the system fails partially.
To realize this requirement, Papers of “Information Processing Society of Japan” Vol. 34, No. 11, November, 1993, pp. 1375 to 1384, “Realtime Video Signal Processor And Its Application” (Nobuyuki Yagi), “2.3 Connecting Schemes,” “FIG. 3 Processor-to-Processor Connection” proposes information processing system architectures including (a) “Bus” scheme as “shared bus connecting” for connecting system component modules with a shared bus, (d) “Complete” scheme as “individual path connecting” for connecting modules necessary for linking with an individual path, and so on.
Further, Japanese Patent Laid-open No. Hei 9-160723 discloses a double bus connecting scheme, an extended version of the above-mentioned shared bus connecting scheme. This double bus connecting scheme requires a dedicated feature for shared-bus arbitration. In this scheme, if the shared bus itself fails or the bus arbitration feature fails, the entire system is disabled. To solve this problem, a connecting scheme has been proposed in which a plurality of shared buses is further prepared to provide redundancy.
On the other hand, in the individual path connecting scheme, the connecting paths between the processors and the shared modules in a system are independent of each other and therefore the fault of one path will not generally affect the entire system.